This invention relates generally to detection circuits and more particularly, it relates to low voltage and low power detection circuits for use in a subscriber power controller integrated circuit which permits communication across the S interface of the Integrated Services Digital Network (ISDN).
In the field of telecommunications, use of digital signalling techniques in transmitting information over long distances is gaining more and more prominence for a wide range of communication, including voice, computer data and video data. Typically, the S or subscriber lines interface as referred to by the Consultative Committee for International Telegraphy and Telephony (CCITT) is used to interconnect ISDN terminal equipment to one or more network terminators such as private branch exchanges (PBX). A subscriber power controller (SPC) is used to convert the 40 volts delivered at the S interface into a stable, regulated 5 volt power supply for integrated circuits in the ISDN terminal equipment such as a telephone or data generating equipment. Such a power controller is manufactured and sold by Advanced Micro Devices, Inc., Sunnyvale, California, under part No. Am37936. The subscriber power controller is an integrated circuit formed of a single-chip package. As a part of the subscriber power controller integrated circuit, there are provided circuits which function to detect and to protect against certain faults most likely to occur at the S interface. In particular, the subscriber power controller is safeguarded against a low input voltage and a low input power.
The low voltage and low power detection circuits of the present invention is provided as a part of the subscriber power controller integrated circuit for performing such fault detecting functions. When the primary input supply voltage drops below a certain preset value, the subscriber power controller is disabled so as to prevent the supply line from being loaded down to an unacceptable low voltage level. Further, when the primary input supply voltage drops below a certain level a microprocessor is informed that the input power is low so as to permit disconnecting of all high power functions in order to conserve power.